Elinnos

elinnos-sv-v7-ahb

README

License: apache-2.0

Model Details

Table with columns: Field, Value
Field	Value
Architecture	Qwen2-7B (decoder-only transformer)
Base Model	`Qwen/Qwen2.5-7B-Instruct`
Adapter Chain	v3 → v4 → v5 → v6 → v7 (this)
LoRA Rank	r=96, alpha=192, dropout=0.05
Target Modules	q_proj, k_proj, v_proj, o_proj, gate_proj, up_proj, down_proj
Adapter Size	~925 MB (safetensors)
Training Precision	bf16 + tf32 (NVIDIA Ampere)
Max Sequence Length	8192 tokens
Training Date	June 2026

Capabilities

The model performs 8 core tasks governed by two output modes:

Direct Mode (Tasks 1–7) — no reasoning tags, structured output only

Bidirectional translation — Verilog/SystemVerilog/Pulse HDL ↔ Pulse HDL console logs
Pulse HDL tool debugging — structured JSON debug reports (issue_type, root_cause, fix_steps, commands, verification, reasoning, confidence)
SystemVerilog simulation prediction — predict exact xrun output including pass/fail and $display messages
SystemVerilog code generation — IEEE 1800-2017/1364, self-contained, self-checking assertions
Pulse HDL bug repair — fix buggy HDL given simulator error log
xrun bug repair — fix buggy SV/Verilog given xrun error log

Thinking Mode (Task 8) — mandatory `<think>...</think>` before answer

AMBA AHB protocol expertise — bus matrix generation, RTL design, verification, arbitration, address map layout, pipeline stage design, testbench generation, SVA assertions, UVM skeletons (AMBA 2.0 / AHB-Lite)

Quick Start

With the LoRA Adapter (4-bit, memory-efficient)

python

import torchfrom transformers import AutoTokenizer, AutoModelForCausalLM, BitsAndBytesConfigfrom peft import PeftModel bnb_cfg = BitsAndBytesConfig(    load_in_4bit=True,    bnb_4bit_compute_dtype=torch.bfloat16,    bnb_4bit_use_double_quant=True,    bnb_4bit_quant_type="nf4",) base = AutoModelForCausalLM.from_pretrained(    "Qwen/Qwen2.5-7B-Instruct",    quantization_config=bnb_cfg,    device_map="auto",)model = PeftModel.from_pretrained(base, "Elinnos/elinnos-sv-v7-ahb")tokenizer = AutoTokenizer.from_pretrained("Elinnos/elinnos-sv-v7-ahb")model.eval() SYSTEM = """You are Elinnos, a hardware design, verification, and reasoning assistant \specialising in SystemVerilog, Pulse HDL, AMBA AHB protocol, and xrun-based simulation \workflows. ..."""  # see inference_v7.py for full system prompt messages = [    {"role": "system",    "content": SYSTEM},    {"role": "user",      "content": "Design an AHB-Lite slave with 4 read/write registers."},]text = tokenizer.apply_chat_template(messages, tokenize=False, add_generation_prompt=True)inputs = tokenizer(text, return_tensors="pt").to(model.device) with torch.inference_mode():    out = model.generate(**inputs, max_new_tokens=2048, do_sample=False)print(tokenizer.decode(out[0][inputs["input_ids"].shape[1]:], skip_special_tokens=True))

With the Merged Model (no adapter load needed)

python

from transformers import AutoTokenizer, AutoModelForCausalLM, BitsAndBytesConfigimport torch bnb_cfg = BitsAndBytesConfig(load_in_4bit=True, bnb_4bit_compute_dtype=torch.bfloat16,                              bnb_4bit_use_double_quant=True, bnb_4bit_quant_type="nf4")model = AutoModelForCausalLM.from_pretrained(    "Elinnos/elinnos-sv-v7-ahb-merged",    quantization_config=bnb_cfg, device_map="auto")tokenizer = AutoTokenizer.from_pretrained("Elinnos/elinnos-sv-v7-ahb-merged")

Training Details

Dataset

File: elinnos_v8_training_combined.jsonl
Total records: 744 (474 AHB + 270 replay from prior versions)
Split: train 80% (596) / val 10% (74) / test 10% (74) — stratified by layer
Dataset repo: Elinnos/elinnos-sv-v7-training-data

Hyperparameters

Table with columns: Parameter, Value
Parameter	Value
Epochs	4
Batch size	1 (effective: 16 via grad. accum.)
Learning rate	4e-5 (cosine schedule)
Warmup ratio	0.03
LoRA r / alpha	96 / 192
LoRA dropout	0.05
Max seq length	8192
Seed	42

Training Metrics

Table with columns: Epoch, train_loss, eval_loss
Epoch	train_loss	eval_loss
1	0.5899	0.5761
2	0.4880	0.5544
3	0.4322	0.5408 ← best
4	0.4155	0.5464

Best checkpoint loaded at end of training (load_best_model_at_end=True).

Infrastructure

GPU: NVIDIA RTX A6000 (48 GB VRAM, Ampere SM 8.6, CUDA 13.0)
Framework: TRL SFTTrainer + PEFT LoRA + Unsloth + HuggingFace Transformers
Gradient checkpointing: Unsloth use_gradient_checkpointing="unsloth" + gradient_checkpointing=True in SFTConfig

Evaluation Results

Evaluated on 74 held-out test samples (greedy decoding, max_new_tokens=2048):

Table with columns: Metric, Value
Metric	Value
ROUGE-L (overall)	~0.38
think_ok (AHB gate compliance)	≥93% (69/70 confirmed at step 70)
AHB samples in test set	47 (63%)
Non-AHB samples	27 (37%)

By layer (AHB difficulty):

Table with columns: Layer, Description, Samples
Layer	Description	Samples
0	AHB fundamentals	8
1	AHB slave design	8
2	AHB bus matrix	10
3	AHB verification	8
4	AHB UVM	7
5	AHB advanced	6

Key Observations

ROUGE-L ≈ 0.38 is expected and appropriate for RTL/code generation: exact character-level matching is inherently strict for code where multiple valid implementations exist. Human evaluation would show higher functional correctness.
think_ok ≥ 93% confirms the model reliably gates <think>...</think> to AHB tasks only.
Known issue — spurious <think> in 1–2 non-AHB replay samples (layer=?): these samples lack explicit task_id metadata, making task-type discrimination harder. Mitigation: v8 dataset will add explicit task_type field to all samples.
Isolated AHB failures (≤5/47): some hard AHB samples with >1500-token think traces produced unclosed </think> due to max_new_tokens=2048 truncation. Increasing to 4096 resolves this at inference time.

Full Pipeline

The ELINNOS fine-tuning pipeline consists of the following phases:

Table with columns: Phase, Description, Status
Phase	Description	Status
0	Environment setup (pip, .env, dirs)	✅
1	Dataset preparation & copy to `datasets/`	✅
2	Training script `train_elinnos_v7.py`	✅
3	Dry run (`--max_steps 5`, OOM-free gate)	✅
4	Full training (4 epochs, )

Pipeline scripts are included in this repository under scripts/.

Adapter Chain History

Table with columns: Version, Focus, Base adapter applied on
Version	Focus	Base adapter applied on
v3	Foundation SV/Verilog	Qwen2.5-7B-Instruct (personal)
v4	Pulse HDL & xrun	v3 merged
v5	Simulation prediction	v4 merged
v6	Multi-task consolidation	v5 merged
v7	AMBA AHB expertise + thinking	v6 merged

Each adapter is trained on the CPU-merged snapshot of all prior adapters, enabling true incremental specialization without catastrophic forgetting.

Limitations

RTL generation quality should be verified via simulation (xrun/verilator) before use in production.
The model was trained on a curated internal dataset; it may not generalize perfectly to proprietary/undocumented EDA tool variants.
Think-mode traces can be truncated on very complex multi-module AHB designs if max_new_tokens is too low. Use ≥4096 for best results.
Not evaluated on UVM sequences beyond basic skeleton generation.

Repository Contents

text

├── adapter_model.safetensors   # LoRA adapter weights (~925 MB)├── adapter_config.json          # PEFT config (r=96, α=192, target_modules)├── tokenizer.json               # Tokenizer (Qwen2 BPE)├── tokenizer_config.json        # Chat template├── README.md                    # This model card├── scripts/│   ├── train_elinnos_v7.py      # Full training script│   ├── eval_v7.py               # Evaluation script│   └── inference_v7.py          # Interactive inference REPL└── logs/    ├── train_v7_full.log        # Full training run log    └── eval_v7.log              # Evaluation run log

Citation

bibtex

@misc{elinnos_sv_v7_ahb_2026,  title        = {ELINNOS SV-v7-AHB: Incremental LoRA Fine-tuning of Qwen2.5-7B for AMBA AHB Hardware Design},  author       = {Elinnos Organization},  year         = {2026},  publisher    = {HuggingFace},  howpublished = {\url{https://huggingface.co/Elinnos/elinnos-sv-v7-ahb}},}

Framework Versions

PEFT 0.19.1
TRL 0.24.0
Transformers 5.5.0
Unsloth (latest)
PyTorch 2.10.0
Datasets 4.3.0

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Model Details

Model Provider

Elinnos

Model Tree

Base

Qwen/Qwen2.5-7B-Instruct

Adapter

this model

Input Modalities

Text

Output Modalities

Text

Supported Functionality

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README

License: apache-2.0

Model Details

Table with columns: Field, Value
Field	Value
Architecture	Qwen2-7B (decoder-only transformer)
Base Model	`Qwen/Qwen2.5-7B-Instruct`
Adapter Chain	v3 → v4 → v5 → v6 → v7 (this)
LoRA Rank	r=96, alpha=192, dropout=0.05
Target Modules	q_proj, k_proj, v_proj, o_proj, gate_proj, up_proj, down_proj
Adapter Size	~925 MB (safetensors)
Training Precision	bf16 + tf32 (NVIDIA Ampere)
Max Sequence Length	8192 tokens
Training Date	June 2026

Capabilities

The model performs 8 core tasks governed by two output modes:

Direct Mode (Tasks 1–7) — no reasoning tags, structured output only

Bidirectional translation — Verilog/SystemVerilog/Pulse HDL ↔ Pulse HDL console logs
Pulse HDL tool debugging — structured JSON debug reports (issue_type, root_cause, fix_steps, commands, verification, reasoning, confidence)
SystemVerilog simulation prediction — predict exact xrun output including pass/fail and $display messages
SystemVerilog code generation — IEEE 1800-2017/1364, self-contained, self-checking assertions
Pulse HDL bug repair — fix buggy HDL given simulator error log
xrun bug repair — fix buggy SV/Verilog given xrun error log

Thinking Mode (Task 8) — mandatory `<think>...</think>` before answer

AMBA AHB protocol expertise — bus matrix generation, RTL design, verification, arbitration, address map layout, pipeline stage design, testbench generation, SVA assertions, UVM skeletons (AMBA 2.0 / AHB-Lite)

Quick Start

With the LoRA Adapter (4-bit, memory-efficient)

python

import torchfrom transformers import AutoTokenizer, AutoModelForCausalLM, BitsAndBytesConfigfrom peft import PeftModel bnb_cfg = BitsAndBytesConfig(    load_in_4bit=True,    bnb_4bit_compute_dtype=torch.bfloat16,    bnb_4bit_use_double_quant=True,    bnb_4bit_quant_type="nf4",) base = AutoModelForCausalLM.from_pretrained(    "Qwen/Qwen2.5-7B-Instruct",    quantization_config=bnb_cfg,    device_map="auto",)model = PeftModel.from_pretrained(base, "Elinnos/elinnos-sv-v7-ahb")tokenizer = AutoTokenizer.from_pretrained("Elinnos/elinnos-sv-v7-ahb")model.eval() SYSTEM = """You are Elinnos, a hardware design, verification, and reasoning assistant \specialising in SystemVerilog, Pulse HDL, AMBA AHB protocol, and xrun-based simulation \workflows. ..."""  # see inference_v7.py for full system prompt messages = [    {"role": "system",    "content": SYSTEM},    {"role": "user",      "content": "Design an AHB-Lite slave with 4 read/write registers."},]text = tokenizer.apply_chat_template(messages, tokenize=False, add_generation_prompt=True)inputs = tokenizer(text, return_tensors="pt").to(model.device) with torch.inference_mode():    out = model.generate(**inputs, max_new_tokens=2048, do_sample=False)print(tokenizer.decode(out[0][inputs["input_ids"].shape[1]:], skip_special_tokens=True))

With the Merged Model (no adapter load needed)

python

from transformers import AutoTokenizer, AutoModelForCausalLM, BitsAndBytesConfigimport torch bnb_cfg = BitsAndBytesConfig(load_in_4bit=True, bnb_4bit_compute_dtype=torch.bfloat16,                              bnb_4bit_use_double_quant=True, bnb_4bit_quant_type="nf4")model = AutoModelForCausalLM.from_pretrained(    "Elinnos/elinnos-sv-v7-ahb-merged",    quantization_config=bnb_cfg, device_map="auto")tokenizer = AutoTokenizer.from_pretrained("Elinnos/elinnos-sv-v7-ahb-merged")

Training Details

Dataset

File: elinnos_v8_training_combined.jsonl
Total records: 744 (474 AHB + 270 replay from prior versions)
Split: train 80% (596) / val 10% (74) / test 10% (74) — stratified by layer
Dataset repo: Elinnos/elinnos-sv-v7-training-data

Hyperparameters

Table with columns: Parameter, Value
Parameter	Value
Epochs	4
Batch size	1 (effective: 16 via grad. accum.)
Learning rate	4e-5 (cosine schedule)
Warmup ratio	0.03
LoRA r / alpha	96 / 192
LoRA dropout	0.05
Max seq length	8192
Seed	42

Training Metrics

Table with columns: Epoch, train_loss, eval_loss
Epoch	train_loss	eval_loss
1	0.5899	0.5761
2	0.4880	0.5544
3	0.4322	0.5408 ← best
4	0.4155	0.5464

Best checkpoint loaded at end of training (load_best_model_at_end=True).

Infrastructure

GPU: NVIDIA RTX A6000 (48 GB VRAM, Ampere SM 8.6, CUDA 13.0)
Framework: TRL SFTTrainer + PEFT LoRA + Unsloth + HuggingFace Transformers
Gradient checkpointing: Unsloth use_gradient_checkpointing="unsloth" + gradient_checkpointing=True in SFTConfig

Evaluation Results

Evaluated on 74 held-out test samples (greedy decoding, max_new_tokens=2048):

Table with columns: Metric, Value
Metric	Value
ROUGE-L (overall)	~0.38
think_ok (AHB gate compliance)	≥93% (69/70 confirmed at step 70)
AHB samples in test set	47 (63%)
Non-AHB samples	27 (37%)

By layer (AHB difficulty):

Table with columns: Layer, Description, Samples
Layer	Description	Samples
0	AHB fundamentals	8
1	AHB slave design	8
2	AHB bus matrix	10
3	AHB verification	8
4	AHB UVM	7
5	AHB advanced	6

Key Observations

ROUGE-L ≈ 0.38 is expected and appropriate for RTL/code generation: exact character-level matching is inherently strict for code where multiple valid implementations exist. Human evaluation would show higher functional correctness.
think_ok ≥ 93% confirms the model reliably gates <think>...</think> to AHB tasks only.
Known issue — spurious <think> in 1–2 non-AHB replay samples (layer=?): these samples lack explicit task_id metadata, making task-type discrimination harder. Mitigation: v8 dataset will add explicit task_type field to all samples.
Isolated AHB failures (≤5/47): some hard AHB samples with >1500-token think traces produced unclosed </think> due to max_new_tokens=2048 truncation. Increasing to 4096 resolves this at inference time.

Full Pipeline

The ELINNOS fine-tuning pipeline consists of the following phases:

Table with columns: Phase, Description, Status
Phase	Description	Status
0	Environment setup (pip, .env, dirs)	✅
1	Dataset preparation & copy to `datasets/`	✅
2	Training script `train_elinnos_v7.py`	✅
3	Dry run (`--max_steps 5`, OOM-free gate)	✅
4	Full training (4 epochs, )

Pipeline scripts are included in this repository under scripts/.

Adapter Chain History

Table with columns: Version, Focus, Base adapter applied on
Version	Focus	Base adapter applied on
v3	Foundation SV/Verilog	Qwen2.5-7B-Instruct (personal)
v4	Pulse HDL & xrun	v3 merged
v5	Simulation prediction	v4 merged
v6	Multi-task consolidation	v5 merged
v7	AMBA AHB expertise + thinking	v6 merged

Each adapter is trained on the CPU-merged snapshot of all prior adapters, enabling true incremental specialization without catastrophic forgetting.

Limitations

RTL generation quality should be verified via simulation (xrun/verilator) before use in production.
The model was trained on a curated internal dataset; it may not generalize perfectly to proprietary/undocumented EDA tool variants.
Think-mode traces can be truncated on very complex multi-module AHB designs if max_new_tokens is too low. Use ≥4096 for best results.
Not evaluated on UVM sequences beyond basic skeleton generation.

Repository Contents

text

├── adapter_model.safetensors   # LoRA adapter weights (~925 MB)├── adapter_config.json          # PEFT config (r=96, α=192, target_modules)├── tokenizer.json               # Tokenizer (Qwen2 BPE)├── tokenizer_config.json        # Chat template├── README.md                    # This model card├── scripts/│   ├── train_elinnos_v7.py      # Full training script│   ├── eval_v7.py               # Evaluation script│   └── inference_v7.py          # Interactive inference REPL└── logs/    ├── train_v7_full.log        # Full training run log    └── eval_v7.log              # Evaluation run log

Citation

bibtex

@misc{elinnos_sv_v7_ahb_2026,  title        = {ELINNOS SV-v7-AHB: Incremental LoRA Fine-tuning of Qwen2.5-7B for AMBA AHB Hardware Design},  author       = {Elinnos Organization},  year         = {2026},  publisher    = {HuggingFace},  howpublished = {\url{https://huggingface.co/Elinnos/elinnos-sv-v7-ahb}},}

Framework Versions

PEFT 0.19.1
TRL 0.24.0
Transformers 5.5.0
Unsloth (latest)
PyTorch 2.10.0
Datasets 4.3.0

elinnos-sv-v7-ahb

README

Model Details

Capabilities

Direct Mode (Tasks 1–7) — no reasoning tags, structured output only

Thinking Mode (Task 8) — mandatory <think>...</think> before answer

Quick Start

With the LoRA Adapter (4-bit, memory-efficient)

With the Merged Model (no adapter load needed)

Training Details

Dataset

Hyperparameters

Training Metrics

Infrastructure

Evaluation Results

Key Observations

Full Pipeline

Adapter Chain History

Limitations

Repository Contents

Citation

Framework Versions

Explore FriendliAI today

README

Model Details

Capabilities

Direct Mode (Tasks 1–7) — no reasoning tags, structured output only

Thinking Mode (Task 8) — mandatory <think>...</think> before answer

Quick Start

With the LoRA Adapter (4-bit, memory-efficient)

With the Merged Model (no adapter load needed)

Training Details

Dataset

Hyperparameters

Training Metrics

Infrastructure

Evaluation Results

Key Observations

Full Pipeline

Adapter Chain History

Limitations

Repository Contents

Citation

Framework Versions

Thinking Mode (Task 8) — mandatory `<think>...</think>` before answer

Thinking Mode (Task 8) — mandatory `<think>...</think>` before answer